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D Amarnath
Chief Architect R&D TechSS
Chippagi Harinagarjun
Technical Architect. Tech SW Services. Semiconductors
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Semiconductor design faces unprecedented complexity.
Moore’s Law scaling has slowed, and Dennard scaling has ended, creating a “power wall” that caps clock speeds around 4–5 GHz. Single-core performance has plateaued, driving multi-core and heterogeneous architectures. Chiplet-based designs, now common, improve yield and flexibility but introduce new verification challenges: modular architectures, high-bandwidth die-to-die interfaces, and distributed systems must be validated under tight schedules.
Verification already consumes up to 70% of design cycles, and complexity is rising. Missing time-to-market windows is costly, yet verifying billions of transistors is harder than ever. AI/ML offers a way forward: intelligent automation to accelerate verification, improve coverage, and reduce effort.
AI/ML is transforming verification workflows through:
Impact
Despite promise, hurdles remain:
To unlock AI/ML’s potential in verification:
AI/ML is poised to become a cornerstone of semiconductor verification, enabling faster cycles and higher quality despite growing complexity.
Success depends on balancing innovation with trust: domain-tuned models, deterministic workflows, and strong governance. With these guardrails, AI will transform verification from a bottleneck into a competitive advantage.